
6 May 2025
Engineering margin: The hidden factor that separates demo from deployment
Maciej Malinowski, Quantum Architecture Team Lead

4
MINUTE READ
When evaluating quantum computers, performance is usually determined by two-qubit gate errors. Of course other metrics exist – qubit count, single-qubit gate errors, T1 times also matter. But two-qubit gate errors are typically the bottleneck to powerful quantum computing, and therefore are seen as a ‘super metric’ when describing any quantum computer.
At Oxford Ionics, we work towards a pioneering technology roadmap that includes achieving a two-qubit gate error rate of less than 0.0001 – that is, a fidelity of 0.9999 or ‘four nines’. This goal is an order of magnitude more ambitious than most of the other players in the market who typically aim for fidelities between 0.99 and 0.999.
The reason for this discrepancy is that in principle, Quantum Error Correction (QEC) only requires fidelity above about ‘two nines’ or 0.99. So to some, ‘four nines’ may seem like an overkill – take for example a comment we received off the back of announcing our record-breaking fidelity results last year:

So, are we beating a dead horse here? Not at all.
We could (and likely will!) spend several blog posts discussing the tremendous benefits of achieving ‘four nines’ over ‘two nines’, including how it enables:
The potential for unlocking early quantum advantage in the pre-fault-tolerant (a.k.a NISQ) regime
A reduction in the physical-to-local encoding ratio in the surface code, unlocking the ability to use low overhead but low threshold qLDPC codes – in turn bringing the timelines of fault-tolerant quantum computers forward by several years
Our ability to solve meaningful problems with up to 10,000x fewer physical qubits – allowing us to deliver systems faster, take up less physical footprint, and significantly reduce power consumption
But actually ‘four nines’ gives us something even more impactful, something that frequently goes unmentioned when discussing how to build quantum computers: it gives us engineering margin.
Why engineering margin matters
Margin - or the difference between a design parameter’s minimum requirements for functionality and its actual capability - is one of the most important concepts in engineering, and in essence the key difference between industrial products and academic demonstrations.
Let’s say we wanted to design an elevator to carry a human. In theory, one could argue that 95% of humans weigh below 150 kg – therefore, we can hang an elevator on a rope rated for 150kg, slap a warning sign in front, and call it a day. That setup may suffice for a Proof of Concept demonstration, but we can universally acknowledge that it would be a terrible product. Why? Because it leaves no margin.
In device engineering, margin is required because as devices grow in scale and complexity, their performance always gets more nuanced and slightly less controlled. Quantum computers are no exception – if a quantum computer operates right at the margin of acceptable error, then increasing the qubit number will make it even more marginal. This, in turn, means that larger quantum computers require more cumbersome calibrations, more detailed simulations, more design iterations, and more fabrication runs.
The only way to build large quantum computers soon is to develop quantum computing technology with plenty of performance margin. At Oxford Ionics, we believe ‘four nines’ gives us this margin, whereas ‘two nines’ or even ‘three nines’ fall short.
For example, a recent paper examined the challenge of building large fault-tolerant quantum computers with superconducting qubits. It found that even though the mean two-qubit gate fidelities of many of today’s superconducting quantum computers are above 0.99, they are insufficient for fault-tolerance. This was in part because the “worst qubit” is significantly lower-performing than the “average qubit”. In other words, there is currently insufficient margin between the average two-qubit error rate and the fault-tolerance threshold required to scale the device to large and useful sizes. The authors conclude that, to get sufficient margin, the target average two-qubit gate fidelity should be…around ‘four nines’!

Tackling engineering margin at Oxford Ionics
To summarise, achieving ‘four nines’ of fidelity from the get-go gives us plenty of engineering margin, dramatically increasing the confidence with which we can guarantee our quantum computers behave fault-tolerantly when operated at a large scale and with full feature integration. However, our focus on error rates is just one of many examples of margin-focused engineering at Oxford Ionics.
In future blog posts, we will discuss other examples of engineering solutions designed to help our quantum computers maintain performance during scale up, from coherent control techniques that reduce quantum gate calibration sensitivity, to integrated near-field antenna designs with a high degree of tolerance, to chip fabrication imperfections.
And in the end, margin does not simply affect the error rates – it impacts the entire quantum computer deployment, from fabrication yield to device uptime and robustness. Thus, when we turn our focus to engineering margin, it’s not so that we can have the best science experiment of them all. It’s to ensure that our customers receive ongoing value from first deployment all the way to fault tolerant quantum computing.